With advancements in modern technologies, people's lives become more convenient increasingly. No matter in work or in entertainment, people cannot avoid electronic products. Thereby, many electronic products are developed to bring convenience to people.
A charge pump based on switched capacitors is applied extensively in various electronic products due to its lower electromagnetic interference (EMI) and higher electromagnetic compatibility (EMC), especially for handheld electronic devices such as PDAs and cell phones. However, following the progress of handheld electronic products, different functions are integrated into a single chip (SOC, System-On-a-Chip) continually. Thereby, the voltage levels supplied to the internal of the chip diversify. The battery of a handheld device usually supplies a single voltage Vsup around 2.7V. Nevertheless, owing to demands from product functions, a charge pump is needed to convert the about −2.7V voltage to various voltages, for example, a voltage doubler, which supplies 2*Vsup (around 4.5V˜5.4V, depending on the load current), and a voltage inverter, which supplies −1*Vsup (around −2V˜−2.7V, depending on the load current). Of course, it is also possible that a voltage multiplier with higher multiplication coexists. For example, in the driving circuit of a small-sized liquid crystal display, a seven- or eight-times voltage multiplier and a five- or six-times negative voltage multiplier are needed. In the fabrication process of integrated circuits, there exist many inherent and inevitable parasitic devices, such as parasitic diodes and parasitic bipolar junction transistors. If these parasitic devices conduct unexpectedly, the performance of the original circuits will be affected or even fail. In the charge pumps according to the prior art, such parasitic diodes exist in the MOS devices used as the switches for capacitors. In the following, the problems caused by the parasitic bipolar junction transistors will be described.
FIGS. 1A, 1B, and 1C show a circuit diagram, timing diagrams, and an integrated-circuit structural schematic diagram of the first and second switches of a doubler charge pump according to the prior art, respectively. As shown in the figures, the doubler charge pump comprises a first switch 10′, a pump capacitor 11′, a second switch 12′, a third switch 13′, a fourth switch 14′, an output capacitor 15′, a first buffer 20′, a second buffer 21′, a third buffer 22′, and a fourth buffer 23′. The first switch 10′ is coupled to the power supply VDD and a first terminal of the pump capacitor 11′. A second terminal of the pump capacitor 11′ is coupled to the second and third switches 12′, 13′. The second switch 12′ is coupled between the power supply VDD and the second terminal 12′. The third switch 13′ is coupled between the second terminal of the pump capacitor 11′ and the ground. The fourth switch 14′ is coupled to the first terminal of the pump capacitor 11′ and one terminal of the output capacitor 15′. The output capacitor 15′ is coupled between the fourth switch 14′ and the ground. The buffers 20′, 21′, 22′, 23′ are coupled to the first, second, third, and fourth switches 10′, 12′, 13′, 14′, respectively, and receive a first, a second, a third, and a fourth input signals, respectively, for controlling the switches. The voltage of the doubler charge pump is about twice the power supply VDD, which is around 2.7V.
In FIG. 1B, the period (T1) can be divided into two parts including a charge-storing phase and a charge-transfer phase. When the charge pump is in the charge-storing phase, the first input signal is high, and the second, third, and fourth input signals are low. In this phase, the pump capacitor 11′ stores charges, and the voltage across the pump capacitor 11′ is VDD. When the charge pump is in the charge-transfer phase, the first input signal is low, and the second, third, and fourth input signals are high. In this phase, the pump capacitor 11′ transfers charges to the output terminal AVDD.
Before the charge pump starts to operate, it is in the charge-storing phase. And the charge pump just starts, the clock of respective input signal starts to operate, that is, the first input signal changes from the high level to the low level to turn off the first switch 10′, and the second, third, and fourth input signals change from the low level to the high level to turn on the second switch 12′, to turn off the third switch 13′, and to turn on the fourth switch 14′, respectively. Thereby, the voltage level of the C1N terminal of the pump capacitor 11′ changes from the low level (GND) to the high level (VDD). Because the voltage across the two terminals of the pump capacitor 11′ will not change instantaneously, the voltage level of the C1P terminal of the pump capacitor 11′ raises in transient from the high level (VDD) to double of the high level (2*VDD). At this time, in the normal (expected) circuit operation, owing to turning on of the fourth switch 14′, the charges in the pump capacitor 11′ will be divided to the output capacitor 15′, and hence increasing the voltage level of the output terminal. However, there exists a parasitic PNP bipolar junction transistor 30′. The emitter voltage is the voltage (2*VDD) of the C1P terminal of the pump capacitor 11′. The base voltage is the voltage (VDD) of the output terminal. The collector voltage is the lowest voltage level in the chip, that is, GND. The voltage VEB across the emitter and the base of the parasitic bipolar junction transistor 30′ is (2*VDD−VDD)=VDD=2.7V, greater than the threshold voltage (about 0.7V) of the bipolar junction transistor 30′. In addition, the voltage VEC across the emitter and the collector is 2*VDD>0. Thereby, the bipolar junction transistor 30′ will be turned on in transient, and the charges originally stored in the pump capacitor 11′ will be conducted to the ground. Consequently, the rise time of the output voltage when starting the charge pump will be prolonged. In a high-temperature environment, it can even lead to starting failure of the charge pump, and incurring a large current.
Besides, when the charge pump has finished starting and the output voltage is raised to a stable value (about 2*VDD), the output voltage will be supplied to another circuit, which is the load of the output voltage of the charge pump, and a voltage drop effect will occur in the output terminal (AVDD<2*VDD). When the load is sufficiently large to make AVDD<(2*VDD−VEB(ON)), where VEB(ON) is the emitter-to-base voltage (around 0.7V) to turn on the parasitic bipolar junction transistor 30′, the bipolar junction transistor 30′ will be turned on periodically in the periodical transients of the charge pumping switching from the charge-storing phase to the charge-transfer phase, which makes the charges originally stored in the pump capacitor 11′ be conducted to the ground and be wasted. Thereby, the power efficiency of the charge pump will be reduced. In the high-temperature environment, the phenomenon can even make the charge pump unable to supply sufficient output voltage, and a large current will be incurred.
Likewise, the problems described above also occur in an inverting charging pump (as shown in FIGS. 2A, 2B, and 2C), and will not be described in detail again.
Accordingly, the present invention provides a novel charge pump, which not only can prevent charge-pump performance deterioration due to turning on of the parasitic bipolar transistor produced during fabrication processes, but also can restore charges to the correct output terminal.